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 2N5060 Series
Preferred Device
Sensitive Gate Silicon Controlled Rectifiers
Reverse Blocking Thyristors
Annular PNPN devices designed for high volume consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO-92/TO-226AA package which is readily adaptable for use in automatic insertion equipment.
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SILICON CONTROLLED RECTIFIERS 0.8 A RMS, 30 - 200 V
* Sensitive Gate Trigger Current - 200 mA Maximum * Low Reverse and Forward Blocking Current - 50 mA Maximum, * * * *
TC = 110C Low Holding Current - 5 mA Maximum Passivated Surface for Reliability and Uniformity Device Marking: Device Type, e.g., 2N5060, Date Code Pb-Free Packages are Available*
G A K
MARKING DIAGRAM
2N 50xx YWW
1
2
3
TO-92 CASE 29 STYLE 10
50xx Y WW
Specific Device Code = Year = Work Week
PIN ASSIGNMENT
1 2 3 Cathode Gate Anode
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
Preferred devices are recommended choices for future use and best overall value.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
1
January, 2005 - Rev. 7
Publication Order Number: 2N5060/D
2N5060 Series
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Peak Repetitive Off-State Voltage (Note 1) (TJ = *40 to 110C, Sine Wave, 50 to 60 Hz, Gate Open) 2N5060 2N5061 2N5062 2N5064 On-State Current RMS (180 Conduction Angles; TC = 80C) *Average On-State Current (180 Conduction Angles) (TC = 67C) (TC = 102C) *Peak Non-repetitive Surge Current, TA = 25C (1/2 cycle, Sine Wave, 60 Hz) Circuit Fusing Considerations (t = 8.3 ms) *Average On-State Current (180 Conduction Angles) (TC = 67C) (TC = 102C) *Forward Peak Gate Power (Pulse Width v 1.0 msec; TA = 25C) *Forward Average Gate Power (TA = 25C, t = 8.3 ms) *Forward Peak Gate Current (Pulse Width v 1.0 msec; TA = 25C) *Reverse Peak Gate Voltage (Pulse Width v 1.0 msec; TA = 25C) *Operating Junction Temperature Range *Storage Temperature Range Symbol VDRM, VRRM 30 60 100 200 IT(RMS) IT(AV) 0.51 0.255 ITSM 10 A 0.8 A A Value Unit V
I2t IT(AV)
0.4
A2s A
0.51 0.255 PGM PG(AV) IGM VRGM TJ Tstg 0.1 0.01 1.0 5.0 -40 to +110 -40 to +150 W W A V C C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.
THERMAL CHARACTERISTICS
Characteristic *Thermal Resistance, Junction-to-Case (Note 2) Thermal Resistance, Junction-to-Ambient *Lead Solder Temperature (Lead Length q 1/16 from case, 10 s Max) Symbol RqJC RqJA - Max 75 200 +230* Unit C/W C/W C
2. This measurement is made with the case mounted "flat side down" on a heatsink and held in position by means of a metal clamp over the curved surface. *Indicates JEDEC Registered Data.
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2
2N5060 Series
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS *Peak Repetitive Forward or Reverse Blocking Current (Note 3) TC = 25C (VAK = Rated VDRM or VRRM) TC = 110C ON CHARACTERISTICS *Peak Forward On-State Voltage (Note 4) (ITM = 1.2 A peak @ TA = 25C) Gate Trigger Current (Continuous DC) (Note 5) *(VAK = 7.0 Vdc, RL = 100 W) Gate Trigger Voltage (Continuous DC) (Note 5) *(VAK = 7.0 Vdc, RL = 100 W) *Gate Non-Trigger Voltage (VAK = Rated VDRM, RL = 100 W) TC = 110C Holding Current (Note 5) *(VAK = 7.0 Vdc, initiating current = 20 mA) Turn-On Time Delay Time Rise Time (IGT = 1.0 mA, VD = Rated VDRM, Forward Current = 1.0 A, di/dt = 6.0 A/ms Turn-Off Time (Forward Current = 1.0 A pulse, Pulse Width = 50 ms, 0.1% Duty Cycle, di/dt = 6.0 A/ms, dv/dt = 20 V/ms, IGT = 1 mA) DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off-State Voltage (Rated VDRM, Exponential) 3. RGK = 1000 W is included in measurement. 4. Forward current applied for 1 ms maximum duration, duty cycle p 1%. 5. RGK current is not included in measurement. *Indicates JEDEC Registered Data. dv/dt - 30 - V/ms TC = 25C TC = -40C TC = 25C TC = -40C TC = 25C TC = -40C VGT VGD 0.1 IH - - - - - - - 3.0 0.2 - 5.0 10 - - mA ms td tr VTM IGT - - - - - - - - 200 350 0.8 1.2 V V - - 1.7 V mA IDRM, IRRM - - - - 10 50 mA mA Symbol Min Typ Max Unit
tq
ms
2N5060, 2N5061 2N5062, 2N5064
- -
10 30
- -
Voltage Current Characteristic of SCR
+ Current Anode + VTM on state IRRM at VRRM IH
Symbol
VDRM IDRM VRRM IRRM VTM IH
Parameter
Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak on State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region Anode -
+ Voltage IDRM at VDRM Forward Blocking Region (off state)
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3
2N5060 Series
CURRENT DERATING
TC , MAXIMUM ALLOWABLE CASE TEMPERATURE (C)
130 120 110 = CONDUCTION ANGLE
a TA , MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( C)
130 = CONDUCTION ANGLE 110 90 70 50 = 30 30 0 0.1 0.2 0.3 60 90 120 180 TYPICAL PRINTED CIRCUIT BOARD MOUNTING
CASE MEASUREMENT POINT - CENTER OF FLAT PORTION dc
100 90 80 70 60 50 0 0.1 0.2 0.3 0.4 = 30 120
60
90
180
dc
0.5
0.4
IT(AV), AVERAGE ON-STATE CURRENT (AMP)
IT(AV), AVERAGE ON-STATE CURRENT (AMP)
Figure 1. Maximum Case Temperature
Figure 2. Maximum Ambient Temperature
CURRENT DERATING
5.0 ITSM , PEAK SURGE CURRENT (AMP) 3.0 2.0 TJ = 110C 25C 1.0 0.7 0.5 0.3 0.2 10 7.0 5.0
3.0 2.0
i T , INSTANTANEOUS ON-STATE CURRENT (AMP)
1.0 1.0
2.0
3.0
5.0 7.0
10
20
30
50 70
100
NUMBER OF CYCLES
Figure 4. Maximum Non-Repetitive Surge Current
0.8 P(AV), MAXIMUM AVERAGE POWER DISSIPATION (WATTS) 0.1 0.07 0.05 120 0.6 a = CONDUCTION ANGLE = 30 60 90
180
0.03 0.02
0.4 dc 0.2
0.01 0 0.5 1.0 1.5 2.0 2.5 vT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)
0
0
0.1
0.2
0.3
0.4
0.5
IT(AV), AVERAGE ON-STATE CURRENT (AMP)
Figure 3. Typical Forward Voltage
Figure 5. Power Dissipation
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4
2N5060 Series
r(t), TRANSIENT THERMAL RESISTANCE NORMALIZED 1.0 0.5 0.2 0.1
0.05
0.02 0.01 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1.0 2.0 5.0 10 20
t, TIME (SECONDS)
Figure 6. Thermal Response
TYPICAL CHARACTERISTICS
0.8 VG , GATE TRIGGER VOLTAGE (VOLTS) 0.7 VAK = 7.0 V RL = 100 RGK = 1.0 k I GT , GATE TRIGGER CURRENT (NORMALIZED) 200 50 20 10 2N5060-61 2N5062-64 VAK = 7.0 V RL = 100
100
0.6
5.0 2.0 1.0 0.5 0.2 -75 -50 -25 0 25 50 75 100 110
0.5 0.4 0.3 -75
-50
-25
0
25
50
75
100 110
TJ, JUNCTION TEMPERATURE (C)
TJ, JUNCTION TEMPERATURE (C)
Figure 7. Typical Gate Trigger Voltage
Figure 8. Typical Gate Trigger Current
4.0 I H , HOLDING CURRENT (NORMALIZED) 3.0 2.0 VAK = 7.0 V RL = 100 RGK = 1.0 k
1.0 0.8
2N5060,61 2N5062-64
0.6 0.4 -75
-50
-25
0
25
50
75
100 110
TJ, JUNCTION TEMPERATURE (C)
Figure 9. Typical Holding Current
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5
2N5060 Series
ORDERING INFORMATION
Device 2N5060 2N5060RLRA 2N5060RLRAG 2N5060RLRM 2N5061 2N5061G 2N5061RLRA 2N5061RLRAG 2N5061RLRM 2N5062 2N5062G 2N5062RLRA 2N5062RLRAG 2N5064 2N5064RLRA 2N5064RLRM 2N5064RLRMG 2N5060RL1 Package TO-92 TO-92 TO-92 (Pb-Free) TO-92 TO-92 TO-92 (Pb-Free) TO-92 TO-92 (Pb-Free) TO-92 TO-92 TO-92 (Pb-Free) TO-92 TO-92 (Pb-Free) TO-92 TO-92 TO-92 TO-92 (Pb-Free) TO-92 Shipping 5,000 Units / Box 2,000 / Tape & Reel 2,000 / Tape & Reel 2,000 / Ammo Pack 5,000 Units / Box 5,000 Units / Box 2,000 / Tape & Reel 2,000 / Tape & Reel 2,000 / Ammo Pack 5,000 Units / Box 5,000 Units / Box 2,000 / Tape & Reel 2,000 / Tape & Reel 5,000 Units / Box 2,000 / Tape & Reel 2,000 / Ammo Pack 2,000 / Ammo Pack 2,000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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6
2N5060 Series
PACKAGE DIMENSIONS TO-92 TO-226AA CASE 29-11 ISSUE AL
A R P L
SEATING PLANE
B
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --- 0.250 --- 0.080 0.105 --- 0.100 0.115 --- 0.135 --- MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --- 6.35 --- 2.04 2.66 --- 2.54 2.93 --- 3.43 ---
K
XX G H V
1
D J C SECTION X-X N N
DIM A B C D G H J K L N P R V
STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE
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7
2N5060 Series
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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8
2N5060/D


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